Description. The CS family members are complete, stereo digital-to-analog output sys- tems including interpolation, 1-bit D/A conversion. The CS/5/6/7/8/9 support all major audio data interface formats, and the individual devices differ only in the supported interface format. The CS family members are complete, stereo digi- package. The CS/ 5/6/7/8/9 support all major audio Figures of the CS/8/9 datasheet.

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Cirrus Logic – datasheet pdf

Sign up using Facebook. Results 1 to 4 of 4. Doodle 1, 4 Oh yeah, i forgot to update the schematic, messed up the calculations when i designed it at first Right now i have a nF capacitor for C4, because it’s all i had laying around. This chip has a clock input called MCLK. Your schematic shows C4 at 4. The time now is Olin Lathrop k 30 But there’s a problem for square and sawtooth waveforms, I can clearly hear aliasing artifacts that get worse the higher the frequency normal for aliasing and it’s annoying the hell out of me.

Is there anything in the I2s object that could be improved or is it in the Waveform modulated object? What I gather from that is that as long as you match your master clock to your input frequency the chip sets the internal dividers itself. Again, I didn’t read the details, but it certainly appears to be synchronous to that clock.


By using our site, you acknowledge that you have dataeheet and understand our Cookie PolicyCs44334 Policyand our Terms of Service. But the equation on page 4 in the CS datasheet seems datasheft say that capacitor ought to be in the 4 to 6 nF range. How to use nonstandard audio sample rate data with audio DAC? It showed the table which made me confused but I have my answer.

Surely the details of that are to be found in the datasheet if you read it carefully. All times are GMT. I got a capacitance of 5nF for an RL of 1k ohm.

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I only briefly looked at the datasheet. So C4 should be around 3. In Table 1 the CS data sheet states that it accepts standard audio sample rates in kHz of 32, How do I deal with this? Ok, just wanted to confirm that. Ok so I’ve made an 8 voice poly synth with four choosable waveforms, 2 operator FM and a selectable 8 voice karplus strong synth.

8-Pin, 24-Bit, 96 kHz Stereo D/A Converters

Sign up using Email and Password. What does one do to get correct output if the audio data sample rate is not one of these number or is less than 32kHz?

This isn’t my area of expertise, but from reading the datasheet I’ve gotten the following: Sign up or log in Sign up using Google. Email Required, but never shown.


Cirrus Logic

I can hear the aliasing at around hz and up with the square wave. Home Questions Tags Users Unanswered. By clicking “Post Your Answer”, you acknowledge that you have read our updated terms of serviceprivacy policy and cookie policyand that your continued use of dattasheet website is subject to these policies. You should be able to get the chip to work over a datsaheet range of sample rates by varying the clock. Probably also wants to be a NP0 ceramic or good quality plastic film type where the capacitance is highly stable as the voltage changesnot X7R ceramic or electrolytic where the capacitance varies with voltage.

Post as a guest Name. Post Your Answer Discard By clicking “Post Your Answer”, you acknowledge that you have read our updated terms of serviceprivacy policy and cookie policyand that your continued use of the website is subject to these policies. There also appears to be some choice of scaling internal to the chip for a given clock.

I’ve included my circuit schematic, CS datasheet and a node diagram of my audio system.